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<title>MTB CAT1 Peripheral driver library: SMIF         (Serial Memory Interface)</title>
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<div class="header">
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<a href="#groups">API Reference</a>  </div>
  <div class="headertitle">
<div class="title">SMIF (Serial Memory Interface)</div>  </div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<p>The SPI-based communication interface to the external quad SPI (QSPI) high-speed memory devices. </p>
<p>The functions and other declarations used in this driver are in cy_smif.h and cy_smif_memslot.h (if used). If you are using the ModusToolbox QSPI Configurator, also include cycfg_qspi_memslot.h.</p>
<p><b>SMIF: Serial Memory Interface</b>: This IP block implements an SPI-based communication interface for interfacing external memory devices to PSoC. The SMIF supports SPI, dual SPI (DSPI), quad SPI (QSPI), dual QSPI and octal SPI.</p>
<p>Features</p><ul>
<li>Standard SPI Master interface</li>
<li>Supports single/dual/quad/octal SPI memory devices</li>
<li>Supports dual quad SPI mode</li>
<li>Design-time configurable support for multiple (up to 4) external serial memory devices</li>
<li>eXecute-In-Place (XIP) operation mode for both read and write accesses with 4KB XIP read cache and on-the-fly encryption and decryption</li>
<li>Supports external serial memory initialization via <a href="https://www.jedec.org/standards-documents/docs/jesd216b" target="_blank">Serial Flash Discoverable Parameters (SFDP)</a> standard</li>
</ul>
<p>The primary usage model for the SMIF is that of an external memory interface. The SMIF is capable of interfacing with different types of memory, up to four types.</p>
<p><b>SMIF</b> driver is divided into three layers</p><ul>
<li>cy_smif.h API</li>
<li>cy_smif_memslot.h API</li>
<li>SMIF configuration structures</li>
</ul>
<p>The SMIF API is divided into the low-level functions and memory-slot functions. Use the low level API for the SMIF block initialization and for implementing a generic SPI communication interface using the SMIF block.</p>
<p>The memory slot API has functions to implement the basic memory operations such as program, read, erase etc. These functions are implemented using the memory parameters in the memory device configuration data structure. The <a class="el" href="group__group__smif__mem__slot__functions.html#ga6f38cc37ab0e6fcb97d2675d1ae11771" title="This function initializes the slots of the memory device in the SMIF configuration. ">Cy_SMIF_MemInit()</a> API initializes all the memory slots based on the settings in the array.</p>
<div class="image">
<img src="smif_3_0_p01_layers.png" alt="smif_3_0_p01_layers.png"/>
</div>
<dl class="section note"><dt>Note</dt><dd>Above image is applicable only for SMIF v3 IP.</dd></dl>
<div class="image">
<img src="smif_1_0_p01_layers.png" alt="smif_1_0_p01_layers.png"/>
</div>
<dl class="section note"><dt>Note</dt><dd>Above image is applicable only for SMIF v1 IP.</dd></dl>
<p>SMIF Configuration Tool is a stand-alone application, which is a part of PDL (Creator) and could be found in &lt;PDL_DIR&gt;/tools/&lt;OS_DIR&gt;/SMIFConfigurationTool (e.g. for PDL 3.0.0 and Windows OS PDL/3.0.0/tools/win/SMIFConfigurationTool).</p>
<p>In ModusToolbox this tool is called QSPI Configurator. QSPI Configurator is a part of PSoC 6 Software Library and can be found in &lt;ModusToolbox&gt;/tools/qspi-configurator-1.1</p>
<p>Tool generates *.c and *.h file with configuration structures. These configuration structures are input parameters for cy_smif_memslot API level</p>
<dl class="section warning"><dt>Warning</dt><dd>The driver is not responsible for external memory persistence. You cannot edit a buffer during the Read/Write operations. If there is a memory error, the SMIF ip block can require a reset. To determine if this has happened, check the SMIF busy status using <a class="el" href="group__group__smif__low__level__functions.html#ga58e965697047847ce906329eb6b5341c" title="This function provides the status of the IP block (False - not busy, True - busy). ">Cy_SMIF_BusyCheck()</a> and implement a timeout. Reset the SMIF block by toggling CTL.ENABLED. Then reconfigure the SMIF block.</dd></dl>
<p>For the Write operation, check that the SMIF driver has completed transferring by calling <a class="el" href="group__group__smif__low__level__functions.html#ga58e965697047847ce906329eb6b5341c" title="This function provides the status of the IP block (False - not busy, True - busy). ">Cy_SMIF_BusyCheck()</a>. Also, check that the memory is available with <a class="el" href="group__group__smif__mem__slot__functions.html#gae648d554521de4d840ace68af2db65a3" title="This function checks if the status of the memory device is busy. ">Cy_SMIF_MemIsBusy()</a> before proceeding.</p>
<p>Simple example of external flash memory programming using low level SMIF API. All steps mentioned in example below are incorporated in <a class="el" href="group__group__smif__mem__slot__functions.html#gac93c10b75a6f4f69da062ee27515e3b5">Cy_SMIF_MemCmdWriteEnable()</a>, <a class="el" href="group__group__smif__mem__slot__functions.html#ga81dda3370adfb1c5ae37c4ff8657d527">Cy_SMIF_MemCmdProgram()</a>, and <a class="el" href="group__group__smif__mem__slot__functions.html#gae648d554521de4d840ace68af2db65a3">Cy_SMIF_MemIsBusy()</a> of the <a class="el" href="group__group__smif__mem__slot__functions.html">memory slot level API</a>. </p><dl class="section warning"><dt>Warning</dt><dd>Example is simplified, without checks of error conditions. </dd></dl>
<dl class="section note"><dt>Note</dt><dd>Flash memories need erase operation before programming. Refer to external memory datasheet for specific memory commands.</dd></dl>
<div class="fragment"><div class="line"></div><div class="line"></div><div class="line">    <span class="comment">/* Enable write operation in external memory. Send Write Enable command to</span></div><div class="line"><span class="comment">     * external memory.  */</span></div><div class="line">    <a class="code" href="group__group__smif__low__level__functions.html#ga5abea630fca93c72faece8b23549cd11">Cy_SMIF_TransmitCommand</a>( SMIF,</div><div class="line">                            0x06U, <span class="comment">/* External memory write enable command */</span></div><div class="line">                            <a class="code" href="group__group__smif__enums.html#ggab71e4b1f4c80b3e8c82dd85570415e44ac1096798c3195819d57ad16de46b4ed7">CY_SMIF_WIDTH_SINGLE</a>,</div><div class="line">                            CMD_WITHOUT_PARAM, <span class="comment">/* Command does not have parameters */</span></div><div class="line">                            CMD_WITHOUT_PARAM,</div><div class="line">                            <a class="code" href="group__group__smif__enums.html#ggab71e4b1f4c80b3e8c82dd85570415e44ac1096798c3195819d57ad16de46b4ed7">CY_SMIF_WIDTH_SINGLE</a>,</div><div class="line">                            <a class="code" href="group__group__smif__enums.html#ggad776a0db9224477ab865254a32d9e312ae942102fb4b1a03a13ca8950b607520d">CY_SMIF_SLAVE_SELECT_0</a>, <span class="comment">/* External memory connected to nSS0 */</span></div><div class="line">                            1U, <span class="comment">/* Disable nSS after command transferred */</span></div><div class="line">                            &amp;smifContext);</div><div class="line"></div><div class="line">    <span class="comment">/* Wait while SMIF IP is transferring command to external memory */</span></div><div class="line">    <span class="keywordflow">while</span>(<a class="code" href="group__group__smif__low__level__functions.html#ga58e965697047847ce906329eb6b5341c">Cy_SMIF_BusyCheck</a>(SMIF));</div><div class="line"></div><div class="line">    uint8_t tst_txBuffer[TX_SIZE]; <span class="comment">/* Buffer to put read date */</span></div><div class="line"></div><div class="line">    <span class="comment">/* Send page program command to external memory */</span></div><div class="line">    <a class="code" href="group__group__smif__low__level__functions.html#ga5abea630fca93c72faece8b23549cd11">Cy_SMIF_TransmitCommand</a>( SMIF,</div><div class="line">                            0x02U,   <span class="comment">/* Page Program external memory command */</span></div><div class="line">                            <a class="code" href="group__group__smif__enums.html#ggab71e4b1f4c80b3e8c82dd85570415e44ac1096798c3195819d57ad16de46b4ed7">CY_SMIF_WIDTH_SINGLE</a>,</div><div class="line">                            address,</div><div class="line">                            MEMORY_ADDRESS_SIZE,</div><div class="line">                            <a class="code" href="group__group__smif__enums.html#ggab71e4b1f4c80b3e8c82dd85570415e44ac1096798c3195819d57ad16de46b4ed7">CY_SMIF_WIDTH_SINGLE</a>,</div><div class="line">                            <a class="code" href="group__group__smif__enums.html#ggad776a0db9224477ab865254a32d9e312ae942102fb4b1a03a13ca8950b607520d">CY_SMIF_SLAVE_SELECT_0</a>,</div><div class="line">                            0U, <span class="comment">/* Not last byte, does not disable nSS line */</span></div><div class="line">                            &amp;smifContext);</div><div class="line">    <span class="comment">/* Send programming data to external memory */</span></div><div class="line">    <a class="code" href="group__group__smif__low__level__functions.html#gae84cdf32e45e492e80dea38f9d3a7586">Cy_SMIF_TransmitData</a>(SMIF, tst_txBuffer, TX_SIZE, <a class="code" href="group__group__smif__enums.html#ggab71e4b1f4c80b3e8c82dd85570415e44ac1096798c3195819d57ad16de46b4ed7">CY_SMIF_WIDTH_SINGLE</a>,</div><div class="line">                            NULL, <span class="comment">/* Callback function is not used */</span></div><div class="line">                            &amp;smifContext);</div><div class="line"></div><div class="line">    <span class="comment">/* Wait while SMIF transfers data */</span></div><div class="line">    <span class="keywordflow">while</span>(<a class="code" href="group__group__smif__low__level__functions.html#ga58e965697047847ce906329eb6b5341c">Cy_SMIF_BusyCheck</a>(SMIF));</div><div class="line"></div><div class="line"></div><div class="line">    <span class="comment">/* Wait until the memory is programed. Cy_SMIF_MemIsBusy() of memslot</span></div><div class="line"><span class="comment">     * API level could be used instead */</span></div><div class="line">    <span class="keywordtype">bool</span> memBusy;</div><div class="line"></div><div class="line">    <span class="keywordflow">do</span></div><div class="line">    {</div><div class="line">        uint8_t readReg = 0U;</div><div class="line"></div><div class="line">        <span class="comment">/* Read the memory status register */</span></div><div class="line">        <a class="code" href="group__group__smif__low__level__functions.html#ga5abea630fca93c72faece8b23549cd11">Cy_SMIF_TransmitCommand</a>( SMIF,</div><div class="line">                                0x05U, <span class="comment">/* Read status register of external memory */</span></div><div class="line">                                <a class="code" href="group__group__smif__enums.html#ggab71e4b1f4c80b3e8c82dd85570415e44ac1096798c3195819d57ad16de46b4ed7">CY_SMIF_WIDTH_SINGLE</a>,</div><div class="line">                                CMD_WITHOUT_PARAM,</div><div class="line">                                CMD_WITHOUT_PARAM,</div><div class="line">                                <a class="code" href="group__group__smif__enums.html#ggab71e4b1f4c80b3e8c82dd85570415e44ac1096798c3195819d57ad16de46b4ed7">CY_SMIF_WIDTH_SINGLE</a>,</div><div class="line">                                <a class="code" href="group__group__smif__enums.html#ggad776a0db9224477ab865254a32d9e312ae942102fb4b1a03a13ca8950b607520d">CY_SMIF_SLAVE_SELECT_0</a>,</div><div class="line">                                0U, <span class="comment">/* Not last byte, does not disable nSS line */</span></div><div class="line">                                &amp;smifContext);</div><div class="line">        <a class="code" href="group__group__smif__low__level__functions.html#ga1b365e1400ccd6580533a0c92deb48c7">Cy_SMIF_ReceiveData</a>(SMIF, &amp;readReg,</div><div class="line">                            1U, <span class="comment">/* Read 1-byte */</span></div><div class="line">                            <a class="code" href="group__group__smif__enums.html#ggab71e4b1f4c80b3e8c82dd85570415e44ac1096798c3195819d57ad16de46b4ed7">CY_SMIF_WIDTH_SINGLE</a>,</div><div class="line">                            NULL, <span class="comment">/* Callback function is not used */</span></div><div class="line">                            &amp;smifContext);</div><div class="line"></div><div class="line">        <span class="comment">/* Check if the SMIF IP is busy */</span></div><div class="line">        <span class="keywordflow">while</span>(<a class="code" href="group__group__smif__low__level__functions.html#ga58e965697047847ce906329eb6b5341c">Cy_SMIF_BusyCheck</a>(SMIF));</div><div class="line"></div><div class="line">        memBusy = ((readReg &amp; MEM_WIP_MASK) != 0U);</div><div class="line">    }</div><div class="line">    <span class="keywordflow">while</span>(memBusy);</div></div><!-- fragment --><p> For the Read operation, before accessing the read buffer, check that it is ready by calling <a class="el" href="group__group__smif__low__level__functions.html#ga10662c147b39a1b71a2f2221b0e3f59f" title="This function is used to read the status of the TX FIFO. ">Cy_SMIF_GetTxFifoStatus()</a>.</p>
<p>Simple example of external flash memory read using low level SMIF API. All steps mentioned in example below are incorporated in <a class="el" href="group__group__smif__mem__slot__functions.html#ga8507571efa28c8187f5e3c795f59fab4">Cy_SMIF_MemCmdRead()</a> of the <a class="el" href="group__group__smif__mem__slot__functions.html">memory slot level API</a>. </p><dl class="section warning"><dt>Warning</dt><dd>Example is simplified, without checks of error conditions. </dd></dl>
<dl class="section note"><dt>Note</dt><dd>Refer to external memory datasheet for specific memory commands.</dd></dl>
<div class="fragment"><div class="line">     <span class="comment">/* Read memory data */</span></div><div class="line">    uint8_t address[MEMORY_ADDRESS_SIZE] = {0U,0U,0U}; <span class="comment">/* Read from 3-byte 0 address */</span></div><div class="line">    uint8_t tst_rxBuffer[RX_SIZE]; <span class="comment">/* Buffer to put read date */</span></div><div class="line">    <a class="code" href="group__group__smif__low__level__functions.html#ga5abea630fca93c72faece8b23549cd11">Cy_SMIF_TransmitCommand</a>(SMIF,</div><div class="line">                            0x03U,    <span class="comment">/* External memory Read command code */</span></div><div class="line">                            <a class="code" href="group__group__smif__enums.html#ggab71e4b1f4c80b3e8c82dd85570415e44ac1096798c3195819d57ad16de46b4ed7">CY_SMIF_WIDTH_SINGLE</a>, <span class="comment">/* Normal SPI mode */</span></div><div class="line">                            address,</div><div class="line">                            MEMORY_ADDRESS_SIZE,</div><div class="line">                            <a class="code" href="group__group__smif__enums.html#ggab71e4b1f4c80b3e8c82dd85570415e44ac1096798c3195819d57ad16de46b4ed7">CY_SMIF_WIDTH_SINGLE</a>,</div><div class="line">                            <a class="code" href="group__group__smif__enums.html#ggad776a0db9224477ab865254a32d9e312ae942102fb4b1a03a13ca8950b607520d">CY_SMIF_SLAVE_SELECT_0</a>, <span class="comment">/* External memory connected to nSS0 */</span></div><div class="line">                            0U, <span class="comment">/* Not last byte, does not disable nSS line */</span></div><div class="line">                            &amp;smifContext);</div><div class="line">    <a class="code" href="group__group__smif__low__level__functions.html#ga1b365e1400ccd6580533a0c92deb48c7">Cy_SMIF_ReceiveData</a>(SMIF, tst_rxBuffer, RX_SIZE, <a class="code" href="group__group__smif__enums.html#ggab71e4b1f4c80b3e8c82dd85570415e44ac1096798c3195819d57ad16de46b4ed7">CY_SMIF_WIDTH_SINGLE</a>,</div><div class="line">                            NULL, <span class="comment">/* Callback function is not used */</span></div><div class="line">                            &amp;smifContext);</div><div class="line"></div><div class="line">    <span class="comment">/* Check SMIF fishes reading operation */</span></div><div class="line">    <span class="keywordflow">while</span>(<a class="code" href="group__group__smif__low__level__functions.html#ga90da2709c1d2a6967101a05e0eb27b08">Cy_SMIF_GetTransferStatus</a>(SMIF, &amp;smifContext) == <a class="code" href="group__group__smif__enums.html#ggaf65a7e26c18fcd3d3469eb083f78bb85af8edf256d08cd59c856ed40dd78b9585">CY_SMIF_RX_BUSY</a>);</div></div><!-- fragment --><p> The user should invalidate the cache by calling <a class="el" href="group__group__smif__low__level__functions.html#ga72240c0ce8307c50b65c4fca45c9cd30" title="This function is used to invalidate/clear the fast cache, the slow cache or both. ...">Cy_SMIF_CacheInvalidate()</a> when switching from the MMIO mode to XIP mode.</p>
<h1><a class="anchor" id="group_smif_configuration"></a>
Configuration Considerations</h1>
<p>PDL API has common parameters: base, context, config described in <a class="el" href="page_getting_started.html#page_getting_started_pdl_design">PDL Design</a> section.</p>
<p>See the documentation for <a class="el" href="group__group__smif__low__level__functions.html#gaea2684847f04e2e7e2c85cfe7fd37881" title="This function initializes the SMIF block as a communication block. ">Cy_SMIF_Init()</a> and <a class="el" href="group__group__smif__mem__slot__functions.html#ga6f38cc37ab0e6fcb97d2675d1ae11771" title="This function initializes the slots of the memory device in the SMIF configuration. ">Cy_SMIF_MemInit()</a> for details on the required configuration structures and other initialization topics.</p>
<p>The normal (MMIO) mode is used for implementing a generic SPI/DSPI/QSPI/dual QSPI/octal SPI communication interface using the SMIF block. This interface can be used to implement special commands like Program/Erase of flash, memory device configuration, sleep mode entry for memory devices or other special commands specific to the memory device. The transfer width (SPI/DSPI/QSPI/octal SPI) of a transmission is a parameter set for each transmit/receive operation. So these can be changed at run time.</p>
<p>In a typical memory interface with flash memory, the SMIF is used in the memory mode when reading from the memory and it switches to the normal mode when writing to flash memory. A typical memory device has multiple types of commands.</p>
<p>The SMIF interface can be used to transmit different types of commands. Each command has different phases: command, dummy cycles, and transmit and receive data which require separate APIs.</p>
<h2><a class="anchor" id="group_smif_init"></a>
SMIF Initialization</h2>
<p>Create interrupt function and allocate memory for SMIF context structure </p><div class="fragment"><div class="line"><a class="code" href="structcy__stc__smif__context__t.html">cy_stc_smif_context_t</a> smifContext;</div><div class="line"></div><div class="line"><span class="keywordtype">void</span> SMIF_Interrupt_User(<span class="keywordtype">void</span>)</div><div class="line">{</div><div class="line">    <a class="code" href="group__group__smif__low__level__functions.html#gaedbec6f968745b8f594dd4b32e91ceba">Cy_SMIF_Interrupt</a>(SMIF, &amp;smifContext);</div><div class="line">}</div></div><!-- fragment --><p>SMIF driver initialization for low level API usage (cysmif.h) </p><div class="fragment"><div class="line"></div><div class="line">    <span class="comment">/* Main configuration parameters*/</span></div><div class="line"><span class="preprocessor">    #define NUMBER_OF_EXTERNAL_MEM      (2U)</span></div><div class="line"><span class="preprocessor">    #define SMIF_PRIORITY               (1U)</span></div><div class="line"><span class="preprocessor">    #define TIMEOUT_1_S                 (1000U)</span></div><div class="line"><span class="preprocessor">    #define DESELECT_DELAY              (7U)</span></div><div class="line"></div><div class="line">    <span class="comment">/* SMIF interrupt initialization */</span></div><div class="line"><span class="preprocessor">    #if defined (CY_DEVICE_CAT1A)</span></div><div class="line"><span class="preprocessor">    #define SMIF_INTERRUPT smif_interrupt_IRQn</span></div><div class="line"><span class="preprocessor">    #elif defined (CY_DEVICE_CAT1B)</span></div><div class="line"><span class="preprocessor">    #define SMIF_INTERRUPT smif_interrupt_normal_IRQn</span></div><div class="line"><span class="preprocessor">    #elif defined (CY_DEVICE_CAT1C)</span></div><div class="line"><span class="preprocessor">    #if (defined(SMIF_SMIF_NR) &amp;&amp; SMIF_SMIF_NR != 1)</span></div><div class="line"><span class="preprocessor">    #define SMIF_INTERRUPT smif_0_smif0_interrupt_IRQn</span></div><div class="line"><span class="preprocessor">    #else</span></div><div class="line"><span class="preprocessor">    #define SMIF_INTERRUPT smif_0_interrupt_IRQn</span></div><div class="line"><span class="preprocessor">    #endif</span></div><div class="line"><span class="preprocessor">    #elif defined (CY_DEVICE_CAT1D)</span></div><div class="line"><span class="preprocessor">    #define SMIF_INTERRUPT smif_0_smif0_interrupt_IRQn </span><span class="comment">/* For SMIF0 CORE0 instance */</span><span class="preprocessor"></span></div><div class="line"><span class="preprocessor">    #endif</span></div><div class="line"></div><div class="line">    <a class="code" href="structcy__stc__sysint__t.html">cy_stc_sysint_t</a> smifIntConfig =</div><div class="line">    {</div><div class="line"><span class="preprocessor">        #if (CY_CPU_CORTEX_M0P)</span></div><div class="line">            <span class="comment">/* .intrSrc */</span> NvicMux7_IRQn,</div><div class="line">            <span class="comment">/* .cm0pSrc */</span> SMIF_INTERRUPT,</div><div class="line"><span class="preprocessor">        #elif (defined(CPUSS_SYSTEM_IRQ_PRESENT) &amp;&amp; CPUSS_SYSTEM_IRQ_PRESENT == 1)</span></div><div class="line">            <span class="comment">/* .intrSrc */</span> ((uint32_t)NvicMux7_IRQn &lt;&lt; <a class="code" href="group__group__sysint.html#ga3b9f1b9de4f122495a8b6580ce500d9a">CY_SYSINT_INTRSRC_MUXIRQ_SHIFT</a>) | (uint32_t)SMIF_INTERRUPT,</div><div class="line">        #<span class="keywordflow">else</span></div><div class="line">            <span class="comment">/* .intrSrc */</span> SMIF_INTERRUPT, <span class="comment">/* SMIF interrupt number (non M0 core)*/</span></div><div class="line">        #endif</div><div class="line">        <span class="comment">/* .intrPriority */</span> SMIF_PRIORITY</div><div class="line">    };</div><div class="line">    (void) <a class="code" href="group__group__sysint__functions.html#gab2ff6820a898e9af3f780000054eea5d">Cy_SysInt_Init</a>(&amp;smifIntConfig, SMIF_Interrupt_User);</div><div class="line"></div><div class="line">    __enable_irq(); <span class="comment">/* Enable global interrupts. */</span></div><div class="line"></div><div class="line">    <span class="comment">/* Enable SMIF interrupt */</span></div><div class="line"><span class="preprocessor">    #if ((__CORTEX_M == 0) || (defined(CPUSS_SYSTEM_IRQ_PRESENT) &amp;&amp; CPUSS_SYSTEM_IRQ_PRESENT == 1))</span></div><div class="line">        NVIC_EnableIRQ(NvicMux7_IRQn);</div><div class="line"><span class="preprocessor">    #else</span></div><div class="line">        NVIC_EnableIRQ(SMIF_INTERRUPT);</div><div class="line"><span class="preprocessor">    #endif</span></div><div class="line"></div><div class="line">    <span class="comment">/* SMIF configuration parameters */</span></div><div class="line">    <a class="code" href="structcy__stc__smif__config__t.html">cy_stc_smif_config_t</a> tst_smifConfig =</div><div class="line">    {</div><div class="line">        .<a class="code" href="structcy__stc__smif__config__t.html#aafd7927f913f7ce00475898ca8a032f8">mode</a>           =  <a class="code" href="group__group__smif__enums.html#gga2baa7c37d2cedf2e2c837facc753ab5da4fe852fb31547c77b31203ec5c43ca91">CY_SMIF_NORMAL</a>,      <span class="comment">/* Mode of operation */</span></div><div class="line">        .deselectDelay  =  DESELECT_DELAY,      <span class="comment">/* Minimum duration of SPI deselection */</span></div><div class="line">        .rxClockSel     =  <a class="code" href="group__group__smif__enums.html#gga6a2149f74b63ec4ebc76b99a9eb633d2a050154bdc9cc2242c0224d8992355951">CY_SMIF_SEL_INVERTED_INTERNAL_CLK</a>,     <span class="comment">/* Clock source for the receiver clock */</span></div><div class="line">        .blockEvent     =  <a class="code" href="group__group__smif__enums.html#ggaf2f886b17b9d40712b212e704665341ea4ee6427df49e552167b2eb7a70f4afc4">CY_SMIF_BUS_ERROR</a>    <span class="comment">/* What happens when there is a read</span></div><div class="line"><span class="comment">                                                 * to an empty RX FIFO or write to a full TX FIFO</span></div><div class="line"><span class="comment">                                                 */</span></div><div class="line">    };</div><div class="line"></div><div class="line">    <span class="comment">/* SMIF initialization */</span></div><div class="line">    <a class="code" href="group__group__smif__low__level__functions.html#gaea2684847f04e2e7e2c85cfe7fd37881">Cy_SMIF_Init</a>(SMIF, &amp;tst_smifConfig, TIMEOUT_1_S, &amp;smifContext);</div><div class="line">    <a class="code" href="group__group__smif__low__level__functions.html#ga5428ca682fd56b837a1a3763fc2596b8">Cy_SMIF_Enable</a>(SMIF, &amp;smifContext);</div><div class="line"></div></div><!-- fragment --><p>Additional steps to initialize SMIF driver for memory slot level API usage (cy_smif_memslot.h). </p><div class="fragment"><div class="line"></div><div class="line">    <span class="comment">/* Configuration parameters for memory S25FL512S*/</span></div><div class="line">    <a class="code" href="structcy__stc__smif__mem__device__cfg__t.html">cy_stc_smif_mem_device_cfg_t</a> S25FL512S;</div><div class="line">    <span class="comment">/* Configuration parameters for memory configuration autodetection*/</span></div><div class="line">    <a class="code" href="structcy__stc__smif__mem__device__cfg__t.html">cy_stc_smif_mem_device_cfg_t</a> autodetectedMemory;</div><div class="line"></div><div class="line">    <a class="code" href="structcy__stc__smif__mem__config__t.html">cy_stc_smif_mem_config_t</a> memSs0 =</div><div class="line">    {</div><div class="line">        .<a class="code" href="structcy__stc__smif__mem__config__t.html#a1ddf064315a00cf0929f632835ad5508">slaveSelect</a>    = <a class="code" href="group__group__smif__enums.html#ggad776a0db9224477ab865254a32d9e312ae942102fb4b1a03a13ca8950b607520d">CY_SMIF_SLAVE_SELECT_0</a>,                    <span class="comment">/* Determines the slot number where the memory device is placed */</span></div><div class="line">        .flags          = <a class="code" href="group__group__smif__macros__flags.html#ga29c9ff0df16794497a73170841902770">CY_SMIF_FLAG_MEMORY_MAPPED</a> | <a class="code" href="group__group__smif__macros__flags.html#gae3932175eef63cefb6740f7b8287067a">CY_SMIF_FLAG_WRITE_ENABLE</a>, <span class="comment">/* Determines if the device is memory mapped. If enabled this memory slot will be initialized in System init */</span></div><div class="line">        .dataSelect     = <a class="code" href="group__group__smif__enums.html#gga6d9ba2ef785b94cf542c573a51a0eb58a7544d58a69a1a2308ebd0cac9099cd24">CY_SMIF_DATA_SEL0</a>,  <span class="comment">/* Data line selection options for a slave device */</span></div><div class="line">        .baseAddress    = 0x18000000UL,       <span class="comment">/* The base address the memory slave is mapped to in the PSoC memory map. Valid when memory mapped mode is enabled */</span></div><div class="line">        .memMappedSize  = 0xFFE00000UL,       <span class="comment">/* The size allocated in the PSoC memory map, for the memory slave device. The size is allocated from the base address</span></div><div class="line"><span class="comment">                                               * Valid when memory mapped mode is enabled */</span></div><div class="line">        .dualQuadSlots  = 0x0UL,</div><div class="line">        .deviceCfg      = &amp;S25FL512S,         <span class="comment">/* Configuration of the device */</span></div><div class="line"><span class="preprocessor">        #if(CY_IP_MXSMIF_VERSION&gt;=2)</span></div><div class="line">        .mergeTimeout = CY_SMIF_MERGE_TIMEOUT_256_CYCLES</div><div class="line"><span class="preprocessor">        #endif </span><span class="comment">/* CY_IP_MXSMIF_VERSION */</span><span class="preprocessor"></span></div><div class="line">    };</div><div class="line"></div><div class="line">    <a class="code" href="structcy__stc__smif__mem__config__t.html">cy_stc_smif_mem_config_t</a> memSs1 =</div><div class="line">    {</div><div class="line">        .<a class="code" href="structcy__stc__smif__mem__config__t.html#a1ddf064315a00cf0929f632835ad5508">slaveSelect</a>   = <a class="code" href="group__group__smif__enums.html#ggad776a0db9224477ab865254a32d9e312abcce904a4fb5c59af91665287c2cc906">CY_SMIF_SLAVE_SELECT_1</a>,   <span class="comment">/* Determines the slot number where the memory device is placed */</span></div><div class="line">        .flags         = <a class="code" href="group__group__smif__macros__flags.html#ga23e01da45ea8e930e94279967557a1c5">CY_SMIF_FLAG_DETECT_SFDP</a>, <span class="comment">/* Determines if the device is memory mapped. If enabled this memory slot will be initialized in System init */</span></div><div class="line">        .dataSelect    = <a class="code" href="group__group__smif__enums.html#gga6d9ba2ef785b94cf542c573a51a0eb58adb81ab40b00daad8ed642d06a9fd96a4">CY_SMIF_DATA_SEL2</a>,        <span class="comment">/* Data line selection options for a slave device */</span></div><div class="line">        .baseAddress   = 0x0UL,</div><div class="line">        .memMappedSize = 0x0UL,</div><div class="line">        .dualQuadSlots = 0x0UL,</div><div class="line">        .deviceCfg     = &amp;autodetectedMemory,      <span class="comment">/* Configuration of the device */</span></div><div class="line"><span class="preprocessor">        #if(CY_IP_MXSMIF_VERSION&gt;=2)</span></div><div class="line">        .mergeTimeout  = CY_SMIF_MERGE_TIMEOUT_256_CYCLES</div><div class="line"><span class="preprocessor">        #endif </span><span class="comment">/* CY_IP_MXSMIF_VERSION */</span><span class="preprocessor"></span></div><div class="line"></div><div class="line">    };</div><div class="line"></div><div class="line">    <a class="code" href="structcy__stc__smif__mem__config__t.html">cy_stc_smif_mem_config_t</a>* smifMemConfigs[NUMBER_OF_EXTERNAL_MEM] = {</div><div class="line">        &amp;memSs0,</div><div class="line">        &amp;memSs1,</div><div class="line">    };</div><div class="line"></div><div class="line">    <a class="code" href="structcy__stc__smif__block__config__t.html">cy_stc_smif_block_config_t</a> smifBlockConfig =</div><div class="line">    {</div><div class="line">        .<a class="code" href="structcy__stc__smif__block__config__t.html#ae864772e8d80652cdaed72ce128069b8">memCount</a>     = NUMBER_OF_EXTERNAL_MEM,   <span class="comment">/* Number of SMIF memories defined  */</span></div><div class="line">        .memConfig    = smifMemConfigs,           <span class="comment">/* Pointer to the array of memory configuration structures of size memCount */</span></div><div class="line">        .majorVersion = 1U,                       <span class="comment">/* Version of the SMIF driver */</span></div><div class="line">        .minorVersion = 0U                        <span class="comment">/* Version of the SMIF Driver */</span></div><div class="line">    };</div><div class="line"></div><div class="line">    <span class="comment">/* Memslot level initialization */</span></div><div class="line">    <a class="code" href="group__group__smif__mem__slot__functions.html#ga6f38cc37ab0e6fcb97d2675d1ae11771">Cy_SMIF_MemInit</a>(SMIF, &amp;smifBlockConfig, &amp;smifContext);</div></div><!-- fragment --><dl class="section note"><dt>Note</dt><dd>Example does not include initialization of all needed configuration structures (<a class="el" href="structcy__stc__smif__mem__device__cfg__t.html">cy_stc_smif_mem_device_cfg_t</a>, <a class="el" href="structcy__stc__smif__mem__cmd__t.html">cy_stc_smif_mem_cmd_t</a>). SMIF/QSPI Configuration tool generates all configuration structures needed for memslot level API usage.</dd></dl>
<h2><a class="anchor" id="group_smif_xip_init"></a>
SMIF XIP Initialization</h2>
<p>The eXecute In Place (XIP) is a mode of operation where read or write commands to the memory device are directed through the SMIF without any use of API function calls. In this mode the SMIF block maps the AHB bus-accesses to external memory device addresses to make it behave similar to internal memory. This allows the CPU to execute code directly from external memory. This mode is not limited to code and is suitable also for data read and write accesses. The memory regions available for XIP addresses allocation are defined in a linker script file (.ld).</p>
<p>With SMIF V3 IP, MMIO mode transactions are also allowed when the device is set to XIP mode. However, only blocking SMIF API's are expected to be used for erase or program operations as external flash will be busy for such operation and may not be available for XIP at that moment. User can make use of <a class="el" href="group__group__smif__mem__slot__functions.html#ga3754459e6dd69599c7646a03a7039136">Cy_SMIF_MemRead</a>, <a class="el" href="group__group__smif__mem__slot__functions.html#ga1906a54462e0cd85e6d5a6e6efc03c7a">Cy_SMIF_MemWrite</a>, <a class="el" href="group__group__smif__mem__slot__functions.html#ga0366724555c54f148c6bec37f084897c">Cy_SMIF_MemEraseSector</a> API's which ensure that user gets control only after completing the requested operation. This will ensure the transaction is complete and then switch back to XIP. In case user wishes to make use of low level API's like <a class="el" href="group__group__smif__low__level__functions.html#gaff84f79f1cb122fa25eb03f73b496e63">Cy_SMIF_TransmitCommand_Ext</a>, <a class="el" href="group__group__smif__low__level__functions.html#ga7c413cce1934b7d3e373f7f1e2270940">Cy_SMIF_TransmitData_Ext</a>, <a class="el" href="group__group__smif__low__level__functions.html#ga3be6006b4c0c72703db49623734eccd6">Cy_SMIF_SendDummyCycles_Ext</a> user has to ensure the code is not running already from XIP location and complete the operation before switching back to XIP mode of execution. Also, user has to bound his complete SMIF operation using <a class="el" href="group__group__syslib__functions.html#gae679f15a1702c159c105b596a8801105">Cy_SysLib_EnterCriticalSection</a> and <a class="el" href="group__group__syslib__functions.html#ga8c16343c075610b2888b0693f972b555">Cy_SysLib_ExitCriticalSection</a> so that there is no interruption for the operation due to any other interrupts.</p>
<div class="fragment"><div class="line"></div><div class="line">    <span class="comment">/* SMIF IP initialization */</span></div><div class="line">    <a class="code" href="group__group__smif__low__level__functions.html#gaea2684847f04e2e7e2c85cfe7fd37881">Cy_SMIF_Init</a>(SMIF, &amp;tst_smifConfig, TIMEOUT_1_S, &amp;smifContext);</div><div class="line">    <a class="code" href="group__group__smif__low__level__functions.html#ga1df033f6664a2b41cf044f2c4ec60817">Cy_SMIF_SetDataSelect</a>(SMIF, <a class="code" href="group__group__smif__enums.html#ggad776a0db9224477ab865254a32d9e312ae942102fb4b1a03a13ca8950b607520d">CY_SMIF_SLAVE_SELECT_0</a>, <a class="code" href="group__group__smif__enums.html#gga6d9ba2ef785b94cf542c573a51a0eb58a7544d58a69a1a2308ebd0cac9099cd24">CY_SMIF_DATA_SEL0</a>);</div><div class="line">    <a class="code" href="group__group__smif__mem__slot__functions.html#ga6f38cc37ab0e6fcb97d2675d1ae11771">Cy_SMIF_MemInit</a>(SMIF, &amp;smifBlockConfig, &amp;smifContext);</div><div class="line"></div><div class="line">    <span class="comment">/* Set XIP mode */</span></div><div class="line">    <a class="code" href="group__group__smif__low__level__functions.html#ga957f49ed7cf091e9b9d736ee589f2583">Cy_SMIF_SetMode</a>(SMIF, <a class="code" href="group__group__smif__enums.html#gga2baa7c37d2cedf2e2c837facc753ab5da562131834e2b77b141db45354e8584ec">CY_SMIF_MEMORY</a>);</div><div class="line"></div><div class="line">    <a class="code" href="group__group__smif__low__level__functions.html#ga5428ca682fd56b837a1a3763fc2596b8">Cy_SMIF_Enable</a>(SMIF, (<a class="code" href="structcy__stc__smif__context__t.html">cy_stc_smif_context_t</a> *)&amp;smifContext);</div></div><!-- fragment --><dl class="section note"><dt>Note</dt><dd>Example of input parameters initialization is in <a class="el" href="group__group__smif.html#group_smif_init">SMIF Initialization</a> section. </dd></dl>
<dl class="section warning"><dt>Warning</dt><dd>Functions that called from external memory should be declared with long call attribute.</dd></dl>
<h2><a class="anchor" id="group_smif_xip_crypto"></a>
SMIF XIP On-the-fly encryption</h2>
<p>In XIP mode, a cryptography component supports on-the-fly encryption for write data and on-the-fly decryption for read data. On-the-fly encryption/decryption in XIP mode can be enabled by setting the flags <a class="el" href="group__group__smif__macros__flags.html#ga4a63040de70e518360dc47c1afe146e3">CY_SMIF_FLAG_CRYPTO_ENABLE</a>. Encryption and decryption are based on the AES-128 forward block cipher: advanced encryption standard blockcipher with a 128-bit key. KEY[127:0] is a secret (private) key programmed into the CRYPTO_KEY3,...,CRYPTO_KEY0 registers using <a class="el" href="group__group__smif__low__level__functions.html#ga49e4163f4131d692405b9e9430ac61b6">Cy_SMIF_SetCryptoKey</a>. These registers are software write-only. A software read returns 0. In the SMIF hardware, by applying AES-128 with KEY[127:0] on a plaintext PT[127:0], we get a ciphertext CT[127:0]. In XIP mode, the XIP address is used as the plaintext PT[]. The resulting ciphertext CT[] is used on-the-fly and not software accessible. The XIP address is extended with the CRYPTO_INPUT3, ..., CRYPTO_INPUT0 registers. <a class="el" href="group__group__smif__low__level__functions.html#gac43fe9363025064cfa881b2bed68c645">Cy_SMIF_SetCryptoIV</a> can be used to set initialization vector (96-bits). In XIP mode, the resulting ciphertext CT[] (of the encrypted address) is XORed with the memory transfers read data or write data. Note that the AES-128 block cipher is on the address of the data and not on the data itself.</p>
<div class="image">
<img src="smif_xip_mode_functionality.png" alt="smif_xip_mode_functionality.png"/>
</div>
<h2><a class="anchor" id="group_smif_usage_rules"></a>
Rules for PSoC6 QSPI/SMIF Block Usage</h2>
<ol type="1">
<li>All operations must use one or more dummy cycles between the PSoC 6 Command and Address phase (when the PSoC 6 MCU drives the data pins) and the device's Response phase (when the device drives the same data pins). Bus contention may occur if no (zero) dummy cycles are used.</li>
<li>Any transfer that does not allow dummy cycles (such as Register Status Reads) must use the single-bit transfer mode. In single-bit mode, the PSoC 6 drives the Command on the Data0 line and the device responds on the Data1 line, so bus contention cannot occur.</li>
</ol>
<h1><a class="anchor" id="group_smif_more_information"></a>
More Information</h1>
<p>More information regarding the Serial Memory Interface can be found in the component datasheet and the Technical Reference Manual (TRM). More information regarding the SMIF Configuration Tool are in SMIF Configuration Tool User Guide located in &lt;PDL_DIR&gt;/tools/&lt;OS_DIR&gt;/SMIFConfigurationTool/ folder</p>
<h1><a class="anchor" id="group_smif_changelog"></a>
Changelog</h1>
<table class="doxtable">
<tr>
<th>Version</th><th>Changes</th><th>Reason for Change </th></tr>
<tr>
<td>2.130 </td><td>Updated APIs : <br />
 <a class="el" href="group__group__smif__low__level__functions.html#gaea2684847f04e2e7e2c85cfe7fd37881">Cy_SMIF_Init</a>, <a class="el" href="group__group__smif__low__level__functions.html#gab67d2aecdf1783c11ea54acb78ea2034">Cy_SMIF_InitCache</a>, <a class="el" href="group__group__smif__low__level__functions.html#gaf787cd8f7a861b180590d688355e8f60">Cy_SMIF_Clean_All_Cache</a>, <a class="el" href="group__group__smif__low__level__functions.html#ga2538ba5552b05c63ae9a2a4c21dbcab3">Cy_SMIF_Invalidate_All_Cache</a>, <a class="el" href="group__group__smif__low__level__functions.html#ga2a1e1e493def6dbcf46207f7e322052d">Cy_SMIF_Clean_And_Invalidate_All_Cache</a>, <a class="el" href="group__group__smif__low__level__functions.html#ga7443088032b3b278ad5a9228be60378b">Cy_SMIF_Clean_Cache_by_Addr</a>, <a class="el" href="group__group__smif__low__level__functions.html#ga4be70e1edc5b91fbe0269e28395ae375">Cy_SMIF_Invalidate_Cache_by_Addr</a> <a class="el" href="group__group__smif__low__level__functions.html#gaa86bff8a6d243c3d27a12414c5fbb174">Cy_SMIF_Clean_And_Invalidate_Cache_by_Addr</a>, <a class="el" href="group__group__smif__mem__slot__functions.html#ga997877a3ca4a218fbec1c00fc4a00138">Cy_SMIF_MemInitSfdpMode</a>.  </td><td>Updated secure interface to Align secure services with TFM and Bug Fixes  </td></tr>
<tr>
<td>2.120 </td><td>Added APIs for MDL and SDL tap settings:<br />
 <a class="el" href="group__group__smif__low__level__functions.html#ga7a547a8e9db987215d7be94e25688ca1">Cy_SMIF_Set_DelayTapSel</a><br />
 <a class="el" href="group__group__smif__low__level__functions.html#gaf94a776664420fda15c8aa4a87b6db7e">Cy_SMIF_Set_Sdl_DelayTapSel</a><br />
 <a class="el" href="group__group__smif__low__level__functions.html#gae88b33af21e1dd8fc761317b4f81b4f4">CY_SMIF_GetDelayTapsNumber</a><br />
<br />
 Added APIs for SMIF Bridge enablement:<br />
 <a class="el" href="group__group__smif__low__level__functions.html#gaa4ba290997356aff8767bf5519fcbb33">Cy_SMIF_IsBridgeOn</a><br />
 <a class="el" href="group__group__smif__low__level__functions.html#ga6633fdcf48299706b9c87369d1adf26f">Cy_SMIF_Bridge_Enable</a><br />
<br />
 Added configurable TX SDR Extra support during SMIF initialized.<br />
<br />
  </td><td>New device support added for Traveo II Cluster.  </td></tr>
<tr>
<td>2.110 </td><td>Added PSOC C3 device support. </td><td>New Device support added.  </td></tr>
<tr>
<td>2.100 </td><td>Updated slaveSelect validity check to allow Dual QSPI use case. </td><td>Bug fixes.  </td></tr>
<tr>
<td>2.90 </td><td>Updated internal API </td><td>Bug fixes.  </td></tr>
<tr>
<td>2.80 </td><td>Added hyperbus support to CAT1C family. </td><td>Code Enhancements.  </td></tr>
<tr>
<td rowspan="2">2.70 </td><td>Added enhancements related to CAT1D family. </td><td>Support added for sending dummy cycles using RWDS line, selecting DLL speed options and RX Capture mode.  </td></tr>
<tr>
<td>Added API <a class="el" href="group__group__smif__mem__slot__functions.html#gacac7e5f4733100422b67fe756e24e5f2">Cy_SMIF_Reset_Memory</a>, updated APIs <a class="el" href="group__group__smif__mem__slot__functions.html#ga6f38cc37ab0e6fcb97d2675d1ae11771">Cy_SMIF_MemInit</a>,<ul>
<li><a class="el" href="group__group__smif__mem__slot__functions.html#gaff12e99b91e8135c8f6cba1935e2caaf">Cy_SMIF_MemOctalEnable</a>, <a class="el" href="group__group__smif__mem__slot__functions.html#ga3754459e6dd69599c7646a03a7039136">Cy_SMIF_MemRead</a>, <a class="el" href="group__group__smif__mem__slot__functions.html#ga1906a54462e0cd85e6d5a6e6efc03c7a">Cy_SMIF_MemWrite</a>. </li>
</ul>
</td><td>Support added for SMIF octal DDR with RWDS and bug fixes.  </td></tr>
<tr>
<td rowspan="3">2.60 </td><td>Modified private APIs  </td><td>MISRA-10.6 violation and Bug fixes.  </td></tr>
<tr>
<td>Added new API <a class="el" href="group__group__smif__mem__slot__functions.html#gad090759fd4274f1ed9af72742ef7354c">Cy_SMIF_SetSelectedDelayTapSel</a> and <a class="el" href="group__group__smif__mem__slot__functions.html#gac18b090fdeb706017c0440961dc398c3">Cy_SMIF_GetSelectedDelayTapSel</a>. </td><td>Support for CAT1D devices.  </td></tr>
<tr>
<td>Modified <a class="el" href="group__group__smif__mem__slot__functions.html#ga1906a54462e0cd85e6d5a6e6efc03c7a">Cy_SMIF_MemWrite</a> and <a class="el" href="group__group__smif__mem__slot__functions.html#ga9fd6efd3e95d3af280f1242b50bf6c9e">Cy_SMIF_MemDeInit</a> APIs. </td><td>Code Enhancement.  </td></tr>
<tr>
<td>2.50 </td><td>Future functionality support for Hyperbus devices. </td><td>Code Enhancements.  </td></tr>
<tr>
<td rowspan="4">2.40 </td><td>Enhanced <a class="el" href="group__group__smif__mem__slot__functions.html#ga0366724555c54f148c6bec37f084897c">Cy_SMIF_MemEraseSector</a> to compute sector boundary for erase operation and <br />
 Minor Bug fixes.  </td><td>Code Enhancements.  </td></tr>
<tr>
<td>Added new API <a class="el" href="group__group__smif__mem__slot__functions.html#ga980d0c489c56484a487cf6f501086133">Cy_SMIF_MemCmdPowerDown</a> and <a class="el" href="group__group__smif__mem__slot__functions.html#gabb2213b32c3004b0b46f63e859e4b7e4">Cy_SMIF_MemCmdReleasePowerDown</a>. </td><td>Reduce power consumption.  </td></tr>
<tr>
<td>Added new API <a class="el" href="group__group__smif__low__level__functions.html#ga194756a68fde927d8b6bbc5255177414">Cy_SMIF_DeviceTransfer_SetMergeTimeout</a> and <a class="el" href="group__group__smif__low__level__functions.html#ga6d2d7ef86eccf2e7a3a2f760208bea0b">Cy_SMIF_DeviceTransfer_ClearMergeTimeout</a>. </td><td>Allow user to configure merge timeout.  </td></tr>
<tr>
<td>Removed Bridge API support. </td><td>Removed feature not supported in existing devices.  </td></tr>
<tr>
<td rowspan="5">2.30 </td><td>Octal SDR and DDR support using SFDP mode. </td><td>Octal device support.  </td></tr>
<tr>
<td>Move SFDP related functionality to cy_smif_sfdp.c.  </td><td>Code Enhancements.  </td></tr>
<tr>
<td>Added support for new product families </td><td>Support for CAT1B and CAT1C devices.  </td></tr>
<tr>
<td>Added new API's:<br />
 <a class="el" href="group__group__smif__mem__slot__functions.html#ga997877a3ca4a218fbec1c00fc4a00138">Cy_SMIF_MemInitSfdpMode()</a><br />
 <a class="el" href="group__group__smif__low__level__functions.html#gac43fe9363025064cfa881b2bed68c645">Cy_SMIF_SetCryptoIV()</a><br />
 <a class="el" href="group__group__smif__low__level__functions.html#ga49e4163f4131d692405b9e9430ac61b6">Cy_SMIF_SetCryptoKey()</a><br />
 <a class="el" href="group__group__smif__low__level__functions.html#ga5252ac741f6ba0122748d89d907d87f6">Cy_SMIF_ConvertSlaveSlotToIndex()</a><br />
 <a class="el" href="group__group__smif__low__level__functions.html#gab65ee303c9b39e383297dae50e1efba1">Cy_SMIF_SetCryptoEnable()</a><br />
 <a class="el" href="group__group__smif__low__level__functions.html#gad5d21a6411e7b0a176394b39d54c6eeb">Cy_SMIF_SetCryptoDisable()</a><br />
 <a class="el" href="group__group__smif__mem__slot__functions.html#ga18824b6bf3b3c8a5ac03a24f748da880">Cy_SMIF_SetReadyPollingDelay()</a><br />
 Following macros renamed:<br />
 CY_SMIF_WRITE_STATUS_REG2_CMD to CY_SMIF_WRITE_STATUS_REG2_T1_CMD. </td><td>Support for SFDP 1.0 devices.  </td></tr>
<tr>
<td>Added new API's for CAT1D devices<br />
 <a class="el" href="group__group__smif__low__level__functions.html#ga25746c7a8d9bd474509d10dcf48133ca">Cy_SMIF_SetRxCaptureMode()</a><br />
 <a class="el" href="group__group__smif__low__level__functions.html#ga6633fdcf48299706b9c87369d1adf26f" title="This function is used to enable/disable Bridge. ">Cy_SMIF_Bridge_Enable()</a><br />
 Cy_SMIF_Bridge_SetPortPriority()<br />
 Cy_SMIF_Bridge_SetSimpleRemapRegion()<br />
 Cy_SMIF_Bridge_SetInterleavingRemapRegion()<br />
 <a class="el" href="group__group__smif__mem__slot__functions.html#gaff12e99b91e8135c8f6cba1935e2caaf">Cy_SMIF_MemOctalEnable()</a><br />
  </td><td>Support for CAT1D devices.  </td></tr>
<tr>
<td>2.20 </td><td>Bug fixes in <a class="el" href="group__group__smif__mem__slot__functions.html#ga0366724555c54f148c6bec37f084897c">Cy_SMIF_MemEraseSector</a> for Hybrid memory configuration. Updated <a class="el" href="group__group__smif__mem__slot__functions.html#ga7538e07a8ab513b8ef223a93528cb4da">Cy_SMIF_MemIsReady</a> to use <a class="el" href="group__group__syslib__functions.html#ga6f18ab2d6141a84a2be60279096eca59">Cy_SysLib_Rtos_Delay</a> and <a class="el" href="group__group__syslib__functions.html#ga2688a50431e6083a707290f3ad91356a">Cy_SysLib_Rtos_DelayUs</a>. </td><td>Code enhancement.  </td></tr>
<tr>
<td>2.10 </td><td>New silicon family support. </td><td>Added extended API for DDR support.  </td></tr>
<tr>
<td rowspan="4">2.0 </td><td>Reworked the <a class="el" href="group__group__smif__mem__slot__functions.html#ga3754459e6dd69599c7646a03a7039136">Cy_SMIF_MemRead</a> and <a class="el" href="group__group__smif__mem__slot__functions.html#ga1906a54462e0cd85e6d5a6e6efc03c7a">Cy_SMIF_MemWrite</a> functions to use polling instead of interrupts. </td><td>Extend the usability of these functions.  </td></tr>
<tr>
<td>Reworked the length-parameter check in the <a class="el" href="group__group__smif__mem__slot__functions.html#ga0366724555c54f148c6bec37f084897c">Cy_SMIF_MemEraseSector</a> function. The Erase operation is not performed and <a class="el" href="group__group__smif__enums.html#gga75fb83c49239ece738cfba778165cb41af59dcc9751976e423239cac212df16cc">CY_SMIF_SUCCESS</a> is no longer returned when the sectors are not aligned. </td><td>Fix the user error-handling of the length parameter.  </td></tr>
<tr>
<td>Fixed the address-parameter check in the <a class="el" href="group__group__smif__mem__slot__functions.html#ga2ecd32504ba15c504203a6ac3daee4c4">Cy_SMIF_MemLocateHybridRegion</a> function. <a class="el" href="group__group__smif__enums.html#gga75fb83c49239ece738cfba778165cb41af59dcc9751976e423239cac212df16cc">CY_SMIF_SUCCESS</a> or <a class="el" href="group__group__smif__enums.html#gga75fb83c49239ece738cfba778165cb41ad69a47ad9f7a4b47ef338af3c9b8bd42">CY_SMIF_NOT_HYBRID_MEM</a> is no longer returned when the address exceeds the memory size. </td><td>Address a defect.  </td></tr>
<tr>
<td>Fixed MISRA 2012 violations. </td><td>MISRA 2012 compliance.  </td></tr>
<tr>
<td>1.50.1 </td><td>Minor documentation updates.  </td><td>Documentation improvement.   </td></tr>
<tr>
<td>1.50 </td><td>Added a new function: <a class="el" href="group__group__smif__mem__slot__functions.html#ga2ecd32504ba15c504203a6ac3daee4c4">Cy_SMIF_MemLocateHybridRegion</a>.<br />
 Added a new structure <a class="el" href="structcy__stc__smif__hybrid__region__info__t.html">cy_stc_smif_hybrid_region_info_t</a>.<br />
 Updated the <a class="el" href="group__group__smif__mem__slot__functions.html#ga0366724555c54f148c6bec37f084897c">Cy_SMIF_MemEraseSector</a> and <a class="el" href="group__group__smif__mem__slot__functions.html#ga885d4bee96580b23b2176917b0cc0ea2">Cy_SMIF_MemCmdSectorErase</a> functions.<br />
 Updated the <a class="el" href="group__group__smif__mem__slot__functions.html#ga7f74353f55fbe56cdc8c93285bbb51d6">Cy_SMIF_MemSfdpDetect</a> function. <br />
 Updated the <a class="el" href="structcy__stc__smif__mem__device__cfg__t.html">cy_stc_smif_mem_device_cfg_t</a> structure. </td><td>Support for memories with hybrid regions.  </td></tr>
<tr>
<td rowspan="2">1.40.1 </td><td>The <a class="el" href="group__group__smif__mem__slot__functions.html#ga6f38cc37ab0e6fcb97d2675d1ae11771">Cy_SMIF_MemInit</a> is changed.  </td><td>Corrected a false assertion during initialization in SFDP mode.  </td></tr>
<tr>
<td>Minor documentation updates.  </td><td></td></tr>
<tr>
<td rowspan="5">1.40 </td><td>The following functions are renamed:<br />
 Cy_SMIF_GetTxfrStatus into Cy_SMIF_GetTransferStatus;<br />
 Cy_SMIF_Memslot_Init into Cy_SMIF_MemInit;<br />
 Cy_SMIF_Memslot_DeInit into Cy_SMIF_MemDeInit;<br />
 Cy_SMIF_Memslot_CmdWriteEnable into Cy_SMIF_MemCmdWriteEnable;<br />
 Cy_SMIF_Memslot_CmdWriteDisable into Cy_SMIF_MemCmdWriteDisable;<br />
 Cy_SMIF_Memslot_IsBusy into Cy_SMIF_MemIsBusy;<br />
 Cy_SMIF_Memslot_QuadEnable into Cy_SMIF_MemQuadEnable;<br />
 Cy_SMIF_Memslot_CmdReadSts into Cy_SMIF_MemCmdReadStatus;<br />
 Cy_SMIF_Memslot_CmdWriteSts into Cy_SMIF_MemCmdWriteStatus;<br />
 Cy_SMIF_Memslot_CmdChipErase into Cy_SMIF_MemCmdChipErase;<br />
 Cy_SMIF_Memslot_CmdSectorErase into Cy_SMIF_MemCmdSectorErase;<br />
 Cy_SMIF_Memslot_SfdpDetect into Cy_SMIF_MemSfdpDetect;<br />
 Cy_SMIF_Memslot_CmdProgram into Cy_SMIF_MemCmdProgram;<br />
 Cy_SMIF_Memslot_CmdRead into Cy_SMIF_MemCmdRead.<br />
 The following ENUMa are renamed:<br />
 CY_SMIF_SEND_CMPLT into CY_SMIF_SEND_COMPLETE;<br />
 CY_SMIF_REC_CMPLT into CY_SMIF_RX_COMPLETE;<br />
 CY_SMIF_REC_BUSY into CY_SMIF_RX_BUSY;<br />
 CY_SMIF_SEL_INV_INTERNAL_CLK into CY_SMIF_SEL_INVERTED_INTERNAL_CLK;<br />
 CY_SMIF_SEL_INV_FEEDBACK_CLK into CY_SMIF_SEL_INVERTED_FEEDBACK_CLK;<br />
 cy_en_smif_cache_en_t into cy_en_smif_cache_t.<br />
 The following MACROs are renamed:<br />
 CY_SMIF_FLAG_WR_EN into CY_SMIF_FLAG_WRITE_ENABLE;<br />
 CY_SMIF_FLAG_CRYPTO_EN into CY_SMIF_FLAG_CRYPTO_ENABLE;<br />
 CY_SMIF_SFDP_SING_BYTE_00 into CY_SMIF_SFDP_SIGNATURE_BYTE_00;<br />
 CY_SMIF_SFDP_SING_BYTE_01 into CY_SMIF_SFDP_SIGNATURE_BYTE_01;<br />
 CY_SMIF_SFDP_SING_BYTE_02 into CY_SMIF_SFDP_SIGNATURE_BYTE_02;<br />
 CY_SMIF_SFDP_SING_BYTE_03 into CY_SMIF_SFDP_SIGNATURE_BYTE_03;<br />
 CY_SMIF_WR_STS_REG1_CMD into CY_SMIF_WRITE_STATUS_REG1_CMD;<br />
 CY_SMIF_WR_DISABLE_CMD into CY_SMIF_WRITE_DISABLE_CMD;<br />
 CY_SMIF_RD_STS_REG1_CMD into CY_SMIF_READ_STATUS_REG1_CMD;<br />
 CY_SMIF_WR_ENABLE_CMD into CY_SMIF_WRITE_ENABLE_CMD;<br />
 CY_SMIF_RD_STS_REG2_T1_CMD into CY_SMIF_READ_STATUS_REG2_T1_CMD;<br />
 CY_SMIF_WR_STS_REG2_CMD into CY_SMIF_WRITE_STATUS_REG2_CMD;<br />
 CY_SMIF_RD_STS_REG2_T2_CMD into CY_SMIF_READ_STATUS_REG2_T2_CMD;<br />
 CY_SMIF_QE_BIT_STS_REG2_T1 into CY_SMIF_QE_BIT_STATUS_REG2_T1;<br />
 CY_SMIF_STS_REG_BUSY_MASK into CY_SMIF_STATUS_REG_BUSY_MASK.<br />
  </td><td rowspan="2">Documentation improvement.  </td></tr>
<tr>
<td>Updated the description of the <a class="el" href="group__group__smif__mem__slot__functions.html#ga6f38cc37ab0e6fcb97d2675d1ae11771" title="This function initializes the slots of the memory device in the SMIF configuration. ">Cy_SMIF_MemInit()</a> function. Updated the <a class="el" href="group__group__smif__low__level__functions.html#ga91a32005b94591adb8fd7daa1068ddbc" title="Uses the Encryption engine to create an encrypted result when the input, key and data arrays are prov...">Cy_SMIF_Encrypt()</a> function usage example.   </td></tr>
<tr>
<td>The type of arguments that are not modified by the functions are set to const.  </td><td>Usability improvement.   </td></tr>
<tr>
<td>The <a class="el" href="group__group__smif__mem__slot__functions.html#ga7f74353f55fbe56cdc8c93285bbb51d6" title="This function detects the device signature for SFDP devices. ">Cy_SMIF_MemSfdpDetect()</a> function is updated to support new commands for 4 bytes addressing.  </td><td>Memory devices with new 4 byte addressing commands support.   </td></tr>
<tr>
<td>Added the blocking functions which take care of the busy-status check of the memory:<ul>
<li><a class="el" href="group__group__smif__mem__slot__functions.html#ga7538e07a8ab513b8ef223a93528cb4da">Cy_SMIF_MemIsReady</a></li>
<li><a class="el" href="group__group__smif__mem__slot__functions.html#ga2967ce386fb4510033571fa67dc69ef7">Cy_SMIF_MemIsQuadEnabled</a></li>
<li><a class="el" href="group__group__smif__mem__slot__functions.html#ga1be9fc6a3d0579ed6dcbf4b0f843c98b">Cy_SMIF_MemEnableQuadMode</a></li>
<li><a class="el" href="group__group__smif__mem__slot__functions.html#ga3754459e6dd69599c7646a03a7039136">Cy_SMIF_MemRead</a></li>
<li><a class="el" href="group__group__smif__mem__slot__functions.html#ga1906a54462e0cd85e6d5a6e6efc03c7a">Cy_SMIF_MemWrite</a></li>
<li><a class="el" href="group__group__smif__mem__slot__functions.html#ga0366724555c54f148c6bec37f084897c">Cy_SMIF_MemEraseSector</a></li>
<li><a class="el" href="group__group__smif__mem__slot__functions.html#ga7525385db143137bd0e16a82e248243d">Cy_SMIF_MemEraseChip</a>  </li>
</ul>
</td><td>Added new high-level blocking functions.   </td></tr>
<tr>
<td rowspan="5">1.30 </td><td>The CY_SMIF_CMD_FIFO_WR_RX_COUNT_Msk value is changed to 0x0000FFFFUL. </td><td rowspan="4">Driver maintenance.  </td></tr>
<tr>
<td>Added the check of the size parameter in the <a class="el" href="group__group__smif__low__level__functions.html#gae84cdf32e45e492e80dea38f9d3a7586" title="This function is used to transmit data using the SMIF interface. ">Cy_SMIF_TransmitData()</a> function.  </td></tr>
<tr>
<td>Added conditional check for presence of the SMIF hardware IP.  </td></tr>
<tr>
<td>Fixed the wrong erase command in the SFDP protocol for devices with Erase Type 3.  </td></tr>
<tr>
<td>Updated the General Description section with minor changes. Updated the ordering of the parameters descriptions for some functions. Added the text saying that the <a class="el" href="group__group__smif__mem__slot__functions.html#ga6f38cc37ab0e6fcb97d2675d1ae11771" title="This function initializes the slots of the memory device in the SMIF configuration. ">Cy_SMIF_MemInit()</a> function is applicable to use the external memory as memory-mapped to PSoC (XIP mode). Added the snippet for the <a class="el" href="group__group__smif__low__level__functions.html#ga91a32005b94591adb8fd7daa1068ddbc" title="Uses the Encryption engine to create an encrypted result when the input, key and data arrays are prov...">Cy_SMIF_Encrypt()</a> function to show how to use this function. Added below the picture in the Low-Level Functions section the sequence of PDL functions required in a Read or Write transaction. Added the text below the picture about the address. Updated DUMMY COUNT in this picture. Added checking of the size parameter in the <a class="el" href="group__group__smif__low__level__functions.html#gae84cdf32e45e492e80dea38f9d3a7586" title="This function is used to transmit data using the SMIF interface. ">Cy_SMIF_TransmitData()</a> function.  </td><td>Documentation improvement.  </td></tr>
<tr>
<td>1.20.1 </td><td>Added upper limit to size parameter in several functions. </td><td>Documentation improvement.  </td></tr>
<tr>
<td rowspan="3">1.20 </td><td>Flattened the organization of the driver source code into the single source directory and the single include directory.  </td><td>Driver library directory-structure simplification.  </td></tr>
<tr>
<td>Added a new return status and transfer width option for the case when the memory command is not supported. </td><td>Improved the memory command structure usability.  </td></tr>
<tr>
<td>Added register access layer. Use register access macros instead of direct register access using dereferenced pointers. </td><td>Makes register access device-independent, so that the PDL does not need to be recompiled for each supported part number.  </td></tr>
<tr>
<td rowspan="2">1.11 </td><td>Fixed internal function that writes to the SMIF FIFO </td><td>The write function stuck in the loop when write speed in external memory is significantly lower than PSoC CPU core speed and write transfer is not finished during the single function call.   </td></tr>
<tr>
<td>Added optional mode part to the program command flow </td><td>Extend usability of program command  </td></tr>
<tr>
<td>1.10.1 </td><td>Added Low Power Callback section </td><td>Documentation update and clarification  </td></tr>
<tr>
<td>1.10 </td><td>Fix write to external memory from CM0+ core. Add checks of API input parameters. Minor documentation updates </td><td></td></tr>
<tr>
<td>1.0 </td><td>Initial version </td><td></td></tr>
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